#define ENABLE_RA6_PULLUP() _CN22PUE = 1
#define DISABLE_RA6_PULLUP() _CN22PUE = 0
#define ENABLE_RA7_PULLUP() _CN23PUE = 1
#define DISABLE_RA7_PULLUP() _CN23PUE = 0
#define ENABLE_RB0_PULLUP() _CN2PUE = 1
#define DISABLE_RB0_PULLUP() _CN2PUE = 0
#define ENABLE_RB1_PULLUP() _CN3PUE = 1
#define DISABLE_RB1_PULLUP() _CN3PUE = 0
#define ENABLE_RB2_PULLUP() _CN4PUE = 1
#define DISABLE_RB2_PULLUP() _CN4PUE = 0
#define ENABLE_RB3_PULLUP() _CN5PUE = 1
#define DISABLE_RB3_PULLUP() _CN5PUE = 0
#define ENABLE_RB4_PULLUP() _CN6PUE = 1
#define DISABLE_RB4_PULLUP() _CN6PUE = 0
#define ENABLE_RB5_PULLUP() _CN7PUE = 1
#define DISABLE_RB5_PULLUP() _CN7PUE = 0
#define ENABLE_RB15_PULLUP() _CN12PUE = 1
#define DISABLE_RB15_PULLUP() _CN12PUE = 0
#define ENABLE_RC13_PULLUP() _CN1PUE = 1
#define DISABLE_RC13_PULLUP() _CN1PUE = 0
#define ENABLE_RC14_PULLUP() _CN0PUE = 1
#define DISABLE_RC14_PULLUP() _CN0PUE = 0
#define ENABLE_RD4_PULLUP() _CN13PUE = 1
#define DISABLE_RD4_PULLUP() _CN13PUE = 0
#define ENABLE_RD5_PULLUP() _CN14PUE = 1
#define DISABLE_RD5_PULLUP() _CN14PUE = 0
#define ENABLE_RD6_PULLUP() _CN15PUE = 1
#define DISABLE_RD6_PULLUP() _CN15PUE = 0
#define ENABLE_RD7_PULLUP() _CN16PUE = 1
#define DISABLE_RD7_PULLUP() _CN16PUE = 0
#define ENABLE_RD13_PULLUP() _CN19PUE = 1
#define DISABLE_RD13_PULLUP() _CN19PUE = 0
#define ENABLE_RD14_PULLUP() _CN20PUE = 1
#define DISABLE_RD14_PULLUP() _CN20PUE = 0
#define ENABLE_RD15_PULLUP() _CN21PUE = 1
#define DISABLE_RD15_PULLUP() _CN21PUE = 0
#define ENABLE_RF4_PULLUP() _CN17PUE = 1
#define DISABLE_RF4_PULLUP() _CN17PUE = 0
#define ENABLE_RF5_PULLUP() _CN18PUE = 1
#define DISABLE_RF5_PULLUP() _CN18PUE = 0
#define ENABLE_RG6_PULLUP() _CN8PUE = 1
#define DISABLE_RG6_PULLUP() _CN8PUE = 0
#define ENABLE_RG7_PULLUP() _CN9PUE = 1
#define DISABLE_RG7_PULLUP() _CN9PUE = 0
#define ENABLE_RG8_PULLUP() _CN10PUE = 1
#define DISABLE_RG8_PULLUP() _CN10PUE = 0
#define ENABLE_RG9_PULLUP() _CN11PUE = 1
#define DISABLE_RG9_PULLUP() _CN11PUE = 0
#define ENABLE_RA6_CN_INTERRUPT() _CN22IE = 1
#define DISABLE_RA6_CN_INTERRUPT() _CN22IE = 0
#define ENABLE_RA7_CN_INTERRUPT() _CN23IE = 1
#define DISABLE_RA7_CN_INTERRUPT() _CN23IE = 0
#define ENABLE_RB0_CN_INTERRUPT() _CN2IE = 1
#define DISABLE_RB0_CN_INTERRUPT() _CN2IE = 0
#define ENABLE_RB1_CN_INTERRUPT() _CN3IE = 1
#define DISABLE_RB1_CN_INTERRUPT() _CN3IE = 0
#define ENABLE_RB2_CN_INTERRUPT() _CN4IE = 1
#define DISABLE_RB2_CN_INTERRUPT() _CN4IE = 0
#define ENABLE_RB3_CN_INTERRUPT() _CN5IE = 1
#define DISABLE_RB3_CN_INTERRUPT() _CN5IE = 0
#define ENABLE_RB4_CN_INTERRUPT() _CN6IE = 1
#define DISABLE_RB4_CN_INTERRUPT() _CN6IE = 0
#define ENABLE_RB5_CN_INTERRUPT() _CN7IE = 1
#define DISABLE_RB5_CN_INTERRUPT() _CN7IE = 0
#define ENABLE_RB15_CN_INTERRUPT() _CN12IE = 1
#define DISABLE_RB15_CN_INTERRUPT() _CN12IE = 0
#define ENABLE_RC13_CN_INTERRUPT() _CN1IE = 1
#define DISABLE_RC13_CN_INTERRUPT() _CN1IE = 0
#define ENABLE_RC14_CN_INTERRUPT() _CN0IE = 1
#define DISABLE_RC14_CN_INTERRUPT() _CN0IE = 0
#define ENABLE_RD4_CN_INTERRUPT() _CN13IE = 1
#define DISABLE_RD4_CN_INTERRUPT() _CN13IE = 0
#define ENABLE_RD5_CN_INTERRUPT() _CN14IE = 1
#define DISABLE_RD5_CN_INTERRUPT() _CN14IE = 0
#define ENABLE_RD6_CN_INTERRUPT() _CN15IE = 1
#define DISABLE_RD6_CN_INTERRUPT() _CN15IE = 0
#define ENABLE_RD7_CN_INTERRUPT() _CN16IE = 1
#define DISABLE_RD7_CN_INTERRUPT() _CN16IE = 0
#define ENABLE_RD13_CN_INTERRUPT() _CN19IE = 1
#define DISABLE_RD13_CN_INTERRUPT() _CN19IE = 0
#define ENABLE_RD14_CN_INTERRUPT() _CN20IE = 1
#define DISABLE_RD14_CN_INTERRUPT() _CN20IE = 0
#define ENABLE_RD15_CN_INTERRUPT() _CN21IE = 1
#define DISABLE_RD15_CN_INTERRUPT() _CN21IE = 0
#define ENABLE_RF4_CN_INTERRUPT() _CN17IE = 1
#define DISABLE_RF4_CN_INTERRUPT() _CN17IE = 0
#define ENABLE_RF5_CN_INTERRUPT() _CN18IE = 1
#define DISABLE_RF5_CN_INTERRUPT() _CN18IE = 0
#define ENABLE_RG6_CN_INTERRUPT() _CN8IE = 1
#define DISABLE_RG6_CN_INTERRUPT() _CN8IE = 0
#define ENABLE_RG7_CN_INTERRUPT() _CN9IE = 1
#define DISABLE_RG7_CN_INTERRUPT() _CN9IE = 0
#define ENABLE_RG8_CN_INTERRUPT() _CN10IE = 1
#define DISABLE_RG8_CN_INTERRUPT() _CN10IE = 0
#define ENABLE_RG9_CN_INTERRUPT() _CN11IE = 1
#define DISABLE_RG9_CN_INTERRUPT() _CN11IE = 0
#define DISABLE_RA6_ANALOG() _PCFG22 = 1
#define ENABLE_RA6_ANALOG() _PCFG22 = 0
#define DISABLE_RA7_ANALOG() _PCFG23 = 1
#define ENABLE_RA7_ANALOG() _PCFG23 = 0
#define DISABLE_RA12_ANALOG() _PCFG20 = 1
#define ENABLE_RA12_ANALOG() _PCFG20 = 0
#define DISABLE_RA13_ANALOG() _PCFG21 = 1
#define ENABLE_RA13_ANALOG() _PCFG21 = 0
#define DISABLE_RB0_ANALOG() _PCFG0 = 1
#define ENABLE_RB0_ANALOG() _PCFG0 = 0
#define DISABLE_RB1_ANALOG() _PCFG1 = 1
#define ENABLE_RB1_ANALOG() _PCFG1 = 0
#define DISABLE_RB2_ANALOG() _PCFG2 = 1
#define ENABLE_RB2_ANALOG() _PCFG2 = 0
#define DISABLE_RB3_ANALOG() _PCFG3 = 1
#define ENABLE_RB3_ANALOG() _PCFG3 = 0
#define DISABLE_RB4_ANALOG() _PCFG4 = 1
#define ENABLE_RB4_ANALOG() _PCFG4 = 0
#define DISABLE_RB5_ANALOG() _PCFG5 = 1
#define ENABLE_RB5_ANALOG() _PCFG5 = 0
#define DISABLE_RB6_ANALOG() _PCFG6 = 1
#define ENABLE_RB6_ANALOG() _PCFG6 = 0
#define DISABLE_RB7_ANALOG() _PCFG7 = 1
#define ENABLE_RB7_ANALOG() _PCFG7 = 0
#define DISABLE_RB8_ANALOG() _PCFG8 = 1
#define ENABLE_RB8_ANALOG() _PCFG8 = 0
#define DISABLE_RB9_ANALOG() _PCFG9 = 1
#define ENABLE_RB9_ANALOG() _PCFG9 = 0
#define DISABLE_RB10_ANALOG() _PCFG10 = 1
#define ENABLE_RB10_ANALOG() _PCFG10 = 0
#define DISABLE_RB11_ANALOG() _PCFG11 = 1
#define ENABLE_RB11_ANALOG() _PCFG11 = 0
#define DISABLE_RB12_ANALOG() _PCFG12 = 1
#define ENABLE_RB12_ANALOG() _PCFG12 = 0
#define DISABLE_RB13_ANALOG() _PCFG13 = 1
#define ENABLE_RB13_ANALOG() _PCFG13 = 0
#define DISABLE_RB14_ANALOG() _PCFG14 = 1
#define ENABLE_RB14_ANALOG() _PCFG14 = 0
#define DISABLE_RB15_ANALOG() _PCFG15 = 1
#define ENABLE_RB15_ANALOG() _PCFG15 = 0
#define DISABLE_RC1_ANALOG() _PCFG16 = 1
#define ENABLE_RC1_ANALOG() _PCFG16 = 0
#define DISABLE_RC2_ANALOG() _PCFG17 = 1
#define ENABLE_RC2_ANALOG() _PCFG17 = 0
#define DISABLE_RC3_ANALOG() _PCFG18 = 1
#define ENABLE_RC3_ANALOG() _PCFG18 = 0
#define DISABLE_RC4_ANALOG() _PCFG19 = 1
#define ENABLE_RC4_ANALOG() _PCFG19 = 0
#define DISABLE_RE0_ANALOG() _PCFG24 = 1
#define ENABLE_RE0_ANALOG() _PCFG24 = 0
#define DISABLE_RE1_ANALOG() _PCFG25 = 1
#define ENABLE_RE1_ANALOG() _PCFG25 = 0
#define DISABLE_RE2_ANALOG() _PCFG26 = 1
#define ENABLE_RE2_ANALOG() _PCFG26 = 0
#define DISABLE_RE3_ANALOG() _PCFG27 = 1
#define ENABLE_RE3_ANALOG() _PCFG27 = 0
#define DISABLE_RE4_ANALOG() _PCFG28 = 1
#define ENABLE_RE4_ANALOG() _PCFG28 = 0
#define DISABLE_RE5_ANALOG() _PCFG29 = 1
#define ENABLE_RE5_ANALOG() _PCFG29 = 0
#define DISABLE_RE6_ANALOG() _PCFG30 = 1
#define ENABLE_RE6_ANALOG() _PCFG30 = 0
#define DISABLE_RE7_ANALOG() _PCFG31 = 1
#define ENABLE_RE7_ANALOG() _PCFG31 = 0
#define ENABLE_RA0_OPENDRAIN() _ODCA0 = 1
#define DISABLE_RA0_OPENDRAIN() _ODCA0 = 0
#define ENABLE_RA1_OPENDRAIN() _ODCA1 = 1
#define DISABLE_RA1_OPENDRAIN() _ODCA1 = 0
#define ENABLE_RA2_OPENDRAIN() _ODCA2 = 1
#define DISABLE_RA2_OPENDRAIN() _ODCA2 = 0
#define ENABLE_RA3_OPENDRAIN() _ODCA3 = 1
#define DISABLE_RA3_OPENDRAIN() _ODCA3 = 0
#define ENABLE_RA4_OPENDRAIN() _ODCA4 = 1
#define DISABLE_RA4_OPENDRAIN() _ODCA4 = 0
#define ENABLE_RA5_OPENDRAIN() _ODCA5 = 1
#define DISABLE_RA5_OPENDRAIN() _ODCA5 = 0
#define ENABLE_RA14_OPENDRAIN() _ODCA14 = 1
#define DISABLE_RA14_OPENDRAIN() _ODCA14 = 0
#define ENABLE_RA15_OPENDRAIN() _ODCA15 = 1
#define DISABLE_RA15_OPENDRAIN() _ODCA15 = 0
#define ENABLE_RD0_OPENDRAIN() _ODCD0 = 1
#define DISABLE_RD0_OPENDRAIN() _ODCD0 = 0
#define ENABLE_RD1_OPENDRAIN() _ODCD1 = 1
#define DISABLE_RD1_OPENDRAIN() _ODCD1 = 0
#define ENABLE_RD2_OPENDRAIN() _ODCD2 = 1
#define DISABLE_RD2_OPENDRAIN() _ODCD2 = 0
#define ENABLE_RD3_OPENDRAIN() _ODCD3 = 1
#define DISABLE_RD3_OPENDRAIN() _ODCD3 = 0
#define ENABLE_RD4_OPENDRAIN() _ODCD4 = 1
#define DISABLE_RD4_OPENDRAIN() _ODCD4 = 0
#define ENABLE_RD5_OPENDRAIN() _ODCD5 = 1
#define DISABLE_RD5_OPENDRAIN() _ODCD5 = 0
#define ENABLE_RD6_OPENDRAIN() _ODCD6 = 1
#define DISABLE_RD6_OPENDRAIN() _ODCD6 = 0
#define ENABLE_RD7_OPENDRAIN() _ODCD7 = 1
#define DISABLE_RD7_OPENDRAIN() _ODCD7 = 0
#define ENABLE_RD8_OPENDRAIN() _ODCD8 = 1
#define DISABLE_RD8_OPENDRAIN() _ODCD8 = 0
#define ENABLE_RD9_OPENDRAIN() _ODCD9 = 1
#define DISABLE_RD9_OPENDRAIN() _ODCD9 = 0
#define ENABLE_RD10_OPENDRAIN() _ODCD10 = 1
#define DISABLE_RD10_OPENDRAIN() _ODCD10 = 0
#define ENABLE_RD11_OPENDRAIN() _ODCD11 = 1
#define DISABLE_RD11_OPENDRAIN() _ODCD11 = 0
#define ENABLE_RD12_OPENDRAIN() _ODCD12 = 1
#define DISABLE_RD12_OPENDRAIN() _ODCD12 = 0
#define ENABLE_RD13_OPENDRAIN() _ODCD13 = 1
#define DISABLE_RD13_OPENDRAIN() _ODCD13 = 0
#define ENABLE_RD14_OPENDRAIN() _ODCD14 = 1
#define DISABLE_RD14_OPENDRAIN() _ODCD14 = 0
#define ENABLE_RD15_OPENDRAIN() _ODCD15 = 1
#define DISABLE_RD15_OPENDRAIN() _ODCD15 = 0
#define ENABLE_RF0_OPENDRAIN() _ODCF0 = 1
#define DISABLE_RF0_OPENDRAIN() _ODCF0 = 0
#define ENABLE_RF1_OPENDRAIN() _ODCF1 = 1
#define DISABLE_RF1_OPENDRAIN() _ODCF1 = 0
#define ENABLE_RF2_OPENDRAIN() _ODCF2 = 1
#define DISABLE_RF2_OPENDRAIN() _ODCF2 = 0
#define ENABLE_RF3_OPENDRAIN() _ODCF3 = 1
#define DISABLE_RF3_OPENDRAIN() _ODCF3 = 0
#define ENABLE_RF4_OPENDRAIN() _ODCF4 = 1
#define DISABLE_RF4_OPENDRAIN() _ODCF4 = 0
#define ENABLE_RF5_OPENDRAIN() _ODCF5 = 1
#define DISABLE_RF5_OPENDRAIN() _ODCF5 = 0
#define ENABLE_RF6_OPENDRAIN() _ODCF6 = 1
#define DISABLE_RF6_OPENDRAIN() _ODCF6 = 0
#define ENABLE_RF7_OPENDRAIN() _ODCF7 = 1
#define DISABLE_RF7_OPENDRAIN() _ODCF7 = 0
#define ENABLE_RF8_OPENDRAIN() _ODCF8 = 1
#define DISABLE_RF8_OPENDRAIN() _ODCF8 = 0
#define ENABLE_RF12_OPENDRAIN() _ODCF12 = 1
#define DISABLE_RF12_OPENDRAIN() _ODCF12 = 0
#define ENABLE_RF13_OPENDRAIN() _ODCF13 = 1
#define DISABLE_RF13_OPENDRAIN() _ODCF13 = 0
#define ENABLE_RG0_OPENDRAIN() _ODCG0 = 1
#define DISABLE_RG0_OPENDRAIN() _ODCG0 = 0
#define ENABLE_RG1_OPENDRAIN() _ODCG1 = 1
#define DISABLE_RG1_OPENDRAIN() _ODCG1 = 0
#define ENABLE_RG2_OPENDRAIN() _ODCG2 = 1
#define DISABLE_RG2_OPENDRAIN() _ODCG2 = 0
#define ENABLE_RG3_OPENDRAIN() _ODCG3 = 1
#define DISABLE_RG3_OPENDRAIN() _ODCG3 = 0
#define ENABLE_RG6_OPENDRAIN() _ODCG6 = 1
#define DISABLE_RG6_OPENDRAIN() _ODCG6 = 0
#define ENABLE_RG7_OPENDRAIN() _ODCG7 = 1
#define DISABLE_RG7_OPENDRAIN() _ODCG7 = 0
#define ENABLE_RG8_OPENDRAIN() _ODCG8 = 1
#define DISABLE_RG8_OPENDRAIN() _ODCG8 = 0
#define ENABLE_RG9_OPENDRAIN() _ODCG9 = 1
#define DISABLE_RG9_OPENDRAIN() _ODCG9 = 0
#define ENABLE_RG12_OPENDRAIN() _ODCG12 = 1
#define DISABLE_RG12_OPENDRAIN() _ODCG12 = 0
#define ENABLE_RG13_OPENDRAIN() _ODCG13 = 1
#define DISABLE_RG13_OPENDRAIN() _ODCG13 = 0
#define ENABLE_RG14_OPENDRAIN() _ODCG14 = 1
#define DISABLE_RG14_OPENDRAIN() _ODCG14 = 0
#define ENABLE_RG15_OPENDRAIN() _ODCG15 = 1
#define DISABLE_RG15_OPENDRAIN() _ODCG15 = 0
static inline void CONFIG_RA0_AS_DIG_OUTPUT(){
 DISABLE_RA0_OPENDRAIN();
 _TRISA0 = 0;
}
static inline void CONFIG_RA1_AS_DIG_OUTPUT(){
 DISABLE_RA1_OPENDRAIN();
 _TRISA1 = 0;
}
static inline void CONFIG_RA2_AS_DIG_OUTPUT(){
 DISABLE_RA2_OPENDRAIN();
 _TRISA2 = 0;
}
static inline void CONFIG_RA3_AS_DIG_OUTPUT(){
 DISABLE_RA3_OPENDRAIN();
 _TRISA3 = 0;
}
static inline void CONFIG_RA4_AS_DIG_OUTPUT(){
 DISABLE_RA4_OPENDRAIN();
 _TRISA4 = 0;
}
static inline void CONFIG_RA5_AS_DIG_OUTPUT(){
 DISABLE_RA5_OPENDRAIN();
 _TRISA5 = 0;
}
static inline void CONFIG_RA6_AS_DIG_OUTPUT(){
 DISABLE_RA6_PULLUP();
 _TRISA6 = 0;
 _PCFG22 = 1;
}
static inline void CONFIG_RA7_AS_DIG_OUTPUT(){
 DISABLE_RA7_PULLUP();
 _TRISA7 = 0;
 _PCFG23 = 1;
}
static inline void CONFIG_RA9_AS_DIG_OUTPUT(){
 _TRISA9 = 0;
}
static inline void CONFIG_RA10_AS_DIG_OUTPUT(){
 _TRISA10 = 0;
}
static inline void CONFIG_RA12_AS_DIG_OUTPUT(){
 _TRISA12 = 0;
 _PCFG20 = 1;
}
static inline void CONFIG_RA13_AS_DIG_OUTPUT(){
 _TRISA13 = 0;
 _PCFG21 = 1;
}
static inline void CONFIG_RA14_AS_DIG_OUTPUT(){
 DISABLE_RA14_OPENDRAIN();
 _TRISA14 = 0;
}
static inline void CONFIG_RA15_AS_DIG_OUTPUT(){
 DISABLE_RA15_OPENDRAIN();
 _TRISA15 = 0;
}
static inline void CONFIG_RB0_AS_DIG_OUTPUT(){
 DISABLE_RB0_PULLUP();
 _TRISB0 = 0;
 _PCFG0 = 1;
}
static inline void CONFIG_RB1_AS_DIG_OUTPUT(){
 DISABLE_RB1_PULLUP();
 _TRISB1 = 0;
 _PCFG1 = 1;
}
static inline void CONFIG_RB2_AS_DIG_OUTPUT(){
 DISABLE_RB2_PULLUP();
 _TRISB2 = 0;
 _PCFG2 = 1;
}
static inline void CONFIG_RB3_AS_DIG_OUTPUT(){
 DISABLE_RB3_PULLUP();
 _TRISB3 = 0;
 _PCFG3 = 1;
}
static inline void CONFIG_RB4_AS_DIG_OUTPUT(){
 DISABLE_RB4_PULLUP();
 _TRISB4 = 0;
 _PCFG4 = 1;
}
static inline void CONFIG_RB5_AS_DIG_OUTPUT(){
 DISABLE_RB5_PULLUP();
 _TRISB5 = 0;
 _PCFG5 = 1;
}
static inline void CONFIG_RB6_AS_DIG_OUTPUT(){
 _TRISB6 = 0;
 _PCFG6 = 1;
}
static inline void CONFIG_RB7_AS_DIG_OUTPUT(){
 _TRISB7 = 0;
 _PCFG7 = 1;
}
static inline void CONFIG_RB8_AS_DIG_OUTPUT(){
 _TRISB8 = 0;
 _PCFG8 = 1;
}
static inline void CONFIG_RB9_AS_DIG_OUTPUT(){
 _TRISB9 = 0;
 _PCFG9 = 1;
}
static inline void CONFIG_RB10_AS_DIG_OUTPUT(){
 _TRISB10 = 0;
 _PCFG10 = 1;
}
static inline void CONFIG_RB11_AS_DIG_OUTPUT(){
 _TRISB11 = 0;
 _PCFG11 = 1;
}
static inline void CONFIG_RB12_AS_DIG_OUTPUT(){
 _TRISB12 = 0;
 _PCFG12 = 1;
}
static inline void CONFIG_RB13_AS_DIG_OUTPUT(){
 _TRISB13 = 0;
 _PCFG13 = 1;
}
static inline void CONFIG_RB14_AS_DIG_OUTPUT(){
 _TRISB14 = 0;
 _PCFG14 = 1;
}
static inline void CONFIG_RB15_AS_DIG_OUTPUT(){
 DISABLE_RB15_PULLUP();
 _TRISB15 = 0;
 _PCFG15 = 1;
}
static inline void CONFIG_RC1_AS_DIG_OUTPUT(){
 _TRISC1 = 0;
 _PCFG16 = 1;
}
static inline void CONFIG_RC2_AS_DIG_OUTPUT(){
 _TRISC2 = 0;
 _PCFG17 = 1;
}
static inline void CONFIG_RC3_AS_DIG_OUTPUT(){
 _TRISC3 = 0;
 _PCFG18 = 1;
}
static inline void CONFIG_RC4_AS_DIG_OUTPUT(){
 _TRISC4 = 0;
 _PCFG19 = 1;
}
static inline void CONFIG_RC12_AS_DIG_OUTPUT(){
 _TRISC12 = 0;
}
static inline void CONFIG_RC13_AS_DIG_OUTPUT(){
 DISABLE_RC13_PULLUP();
 _TRISC13 = 0;
}
static inline void CONFIG_RC14_AS_DIG_OUTPUT(){
 DISABLE_RC14_PULLUP();
 _TRISC14 = 0;
}
static inline void CONFIG_RC15_AS_DIG_OUTPUT(){
 _TRISC15 = 0;
}
static inline void CONFIG_RD0_AS_DIG_OUTPUT(){
 DISABLE_RD0_OPENDRAIN();
 _TRISD0 = 0;
}
static inline void CONFIG_RD1_AS_DIG_OUTPUT(){
 DISABLE_RD1_OPENDRAIN();
 _TRISD1 = 0;
}
static inline void CONFIG_RD2_AS_DIG_OUTPUT(){
 DISABLE_RD2_OPENDRAIN();
 _TRISD2 = 0;
}
static inline void CONFIG_RD3_AS_DIG_OUTPUT(){
 DISABLE_RD3_OPENDRAIN();
 _TRISD3 = 0;
}
static inline void CONFIG_RD4_AS_DIG_OUTPUT(){
 DISABLE_RD4_PULLUP();
 DISABLE_RD4_OPENDRAIN();
 _TRISD4 = 0;
}
static inline void CONFIG_RD5_AS_DIG_OUTPUT(){
 DISABLE_RD5_PULLUP();
 DISABLE_RD5_OPENDRAIN();
 _TRISD5 = 0;
}
static inline void CONFIG_RD6_AS_DIG_OUTPUT(){
 DISABLE_RD6_PULLUP();
 DISABLE_RD6_OPENDRAIN();
 _TRISD6 = 0;
}
static inline void CONFIG_RD7_AS_DIG_OUTPUT(){
 DISABLE_RD7_PULLUP();
 DISABLE_RD7_OPENDRAIN();
 _TRISD7 = 0;
}
static inline void CONFIG_RD8_AS_DIG_OUTPUT(){
 DISABLE_RD8_OPENDRAIN();
 _TRISD8 = 0;
}
static inline void CONFIG_RD9_AS_DIG_OUTPUT(){
 DISABLE_RD9_OPENDRAIN();
 _TRISD9 = 0;
}
static inline void CONFIG_RD10_AS_DIG_OUTPUT(){
 DISABLE_RD10_OPENDRAIN();
 _TRISD10 = 0;
}
static inline void CONFIG_RD11_AS_DIG_OUTPUT(){
 DISABLE_RD11_OPENDRAIN();
 _TRISD11 = 0;
}
static inline void CONFIG_RD12_AS_DIG_OUTPUT(){
 DISABLE_RD12_OPENDRAIN();
 _TRISD12 = 0;
}
static inline void CONFIG_RD13_AS_DIG_OUTPUT(){
 DISABLE_RD13_PULLUP();
 DISABLE_RD13_OPENDRAIN();
 _TRISD13 = 0;
}
static inline void CONFIG_RD14_AS_DIG_OUTPUT(){
 DISABLE_RD14_PULLUP();
 DISABLE_RD14_OPENDRAIN();
 _TRISD14 = 0;
}
static inline void CONFIG_RD15_AS_DIG_OUTPUT(){
 DISABLE_RD15_PULLUP();
 DISABLE_RD15_OPENDRAIN();
 _TRISD15 = 0;
}
static inline void CONFIG_RE0_AS_DIG_OUTPUT(){
 _TRISE0 = 0;
 _PCFG24 = 1;
}
static inline void CONFIG_RE1_AS_DIG_OUTPUT(){
 _TRISE1 = 0;
 _PCFG25 = 1;
}
static inline void CONFIG_RE2_AS_DIG_OUTPUT(){
 _TRISE2 = 0;
 _PCFG26 = 1;
}
static inline void CONFIG_RE3_AS_DIG_OUTPUT(){
 _TRISE3 = 0;
 _PCFG27 = 1;
}
static inline void CONFIG_RE4_AS_DIG_OUTPUT(){
 _TRISE4 = 0;
 _PCFG28 = 1;
}
static inline void CONFIG_RE5_AS_DIG_OUTPUT(){
 _TRISE5 = 0;
 _PCFG29 = 1;
}
static inline void CONFIG_RE6_AS_DIG_OUTPUT(){
 _TRISE6 = 0;
 _PCFG30 = 1;
}
static inline void CONFIG_RE7_AS_DIG_OUTPUT(){
 _TRISE7 = 0;
 _PCFG31 = 1;
}
static inline void CONFIG_RF0_AS_DIG_OUTPUT(){
 DISABLE_RF0_OPENDRAIN();
 _TRISF0 = 0;
}
static inline void CONFIG_RF1_AS_DIG_OUTPUT(){
 DISABLE_RF1_OPENDRAIN();
 _TRISF1 = 0;
}
static inline void CONFIG_RF2_AS_DIG_OUTPUT(){
 DISABLE_RF2_OPENDRAIN();
 _TRISF2 = 0;
}
static inline void CONFIG_RF3_AS_DIG_OUTPUT(){
 DISABLE_RF3_OPENDRAIN();
 _TRISF3 = 0;
}
static inline void CONFIG_RF4_AS_DIG_OUTPUT(){
 DISABLE_RF4_PULLUP();
 DISABLE_RF4_OPENDRAIN();
 _TRISF4 = 0;
}
static inline void CONFIG_RF5_AS_DIG_OUTPUT(){
 DISABLE_RF5_PULLUP();
 DISABLE_RF5_OPENDRAIN();
 _TRISF5 = 0;
}
static inline void CONFIG_RF6_AS_DIG_OUTPUT(){
 DISABLE_RF6_OPENDRAIN();
 _TRISF6 = 0;
}
static inline void CONFIG_RF7_AS_DIG_OUTPUT(){
 DISABLE_RF7_OPENDRAIN();
 _TRISF7 = 0;
}
static inline void CONFIG_RF8_AS_DIG_OUTPUT(){
 DISABLE_RF8_OPENDRAIN();
 _TRISF8 = 0;
}
static inline void CONFIG_RF12_AS_DIG_OUTPUT(){
 DISABLE_RF12_OPENDRAIN();
 _TRISF12 = 0;
}
static inline void CONFIG_RF13_AS_DIG_OUTPUT(){
 DISABLE_RF13_OPENDRAIN();
 _TRISF13 = 0;
}
static inline void CONFIG_RG0_AS_DIG_OUTPUT(){
 DISABLE_RG0_OPENDRAIN();
 _TRISG0 = 0;
}
static inline void CONFIG_RG1_AS_DIG_OUTPUT(){
 DISABLE_RG1_OPENDRAIN();
 _TRISG1 = 0;
}
static inline void CONFIG_RG2_AS_DIG_OUTPUT(){
 DISABLE_RG2_OPENDRAIN();
 _TRISG2 = 0;
}
static inline void CONFIG_RG3_AS_DIG_OUTPUT(){
 DISABLE_RG3_OPENDRAIN();
 _TRISG3 = 0;
}
static inline void CONFIG_RG6_AS_DIG_OUTPUT(){
 DISABLE_RG6_PULLUP();
 DISABLE_RG6_OPENDRAIN();
 _TRISG6 = 0;
}
static inline void CONFIG_RG7_AS_DIG_OUTPUT(){
 DISABLE_RG7_PULLUP();
 DISABLE_RG7_OPENDRAIN();
 _TRISG7 = 0;
}
static inline void CONFIG_RG8_AS_DIG_OUTPUT(){
 DISABLE_RG8_PULLUP();
 DISABLE_RG8_OPENDRAIN();
 _TRISG8 = 0;
}
static inline void CONFIG_RG9_AS_DIG_OUTPUT(){
 DISABLE_RG9_PULLUP();
 DISABLE_RG9_OPENDRAIN();
 _TRISG9 = 0;
}
static inline void CONFIG_RG12_AS_DIG_OUTPUT(){
 DISABLE_RG12_OPENDRAIN();
 _TRISG12 = 0;
}
static inline void CONFIG_RG13_AS_DIG_OUTPUT(){
 DISABLE_RG13_OPENDRAIN();
 _TRISG13 = 0;
}
static inline void CONFIG_RG14_AS_DIG_OUTPUT(){
 DISABLE_RG14_OPENDRAIN();
 _TRISG14 = 0;
}
static inline void CONFIG_RG15_AS_DIG_OUTPUT(){
 DISABLE_RG15_OPENDRAIN();
 _TRISG15 = 0;
}
static inline void CONFIG_RA0_AS_DIG_OD_OUTPUT(){
 ENABLE_RA0_OPENDRAIN();
 _TRISA0 = 0;
}
static inline void CONFIG_RA1_AS_DIG_OD_OUTPUT(){
 ENABLE_RA1_OPENDRAIN();
 _TRISA1 = 0;
}
static inline void CONFIG_RA2_AS_DIG_OD_OUTPUT(){
 ENABLE_RA2_OPENDRAIN();
 _TRISA2 = 0;
}
static inline void CONFIG_RA3_AS_DIG_OD_OUTPUT(){
 ENABLE_RA3_OPENDRAIN();
 _TRISA3 = 0;
}
static inline void CONFIG_RA4_AS_DIG_OD_OUTPUT(){
 ENABLE_RA4_OPENDRAIN();
 _TRISA4 = 0;
}
static inline void CONFIG_RA5_AS_DIG_OD_OUTPUT(){
 ENABLE_RA5_OPENDRAIN();
 _TRISA5 = 0;
}
static inline void CONFIG_RA6_AS_DIG_OD_OUTPUT(){
 DISABLE_RA6_PULLUP();
 _TRISA6 = 0;
 _PCFG22 = 1;
}
static inline void CONFIG_RA7_AS_DIG_OD_OUTPUT(){
 DISABLE_RA7_PULLUP();
 _TRISA7 = 0;
 _PCFG23 = 1;
}
static inline void CONFIG_RA9_AS_DIG_OD_OUTPUT(){
 _TRISA9 = 0;
}
static inline void CONFIG_RA10_AS_DIG_OD_OUTPUT(){
 _TRISA10 = 0;
}
static inline void CONFIG_RA12_AS_DIG_OD_OUTPUT(){
 _TRISA12 = 0;
 _PCFG20 = 1;
}
static inline void CONFIG_RA13_AS_DIG_OD_OUTPUT(){
 _TRISA13 = 0;
 _PCFG21 = 1;
}
static inline void CONFIG_RA14_AS_DIG_OD_OUTPUT(){
 ENABLE_RA14_OPENDRAIN();
 _TRISA14 = 0;
}
static inline void CONFIG_RA15_AS_DIG_OD_OUTPUT(){
 ENABLE_RA15_OPENDRAIN();
 _TRISA15 = 0;
}
static inline void CONFIG_RB0_AS_DIG_OD_OUTPUT(){
 DISABLE_RB0_PULLUP();
 _TRISB0 = 0;
 _PCFG0 = 1;
}
static inline void CONFIG_RB1_AS_DIG_OD_OUTPUT(){
 DISABLE_RB1_PULLUP();
 _TRISB1 = 0;
 _PCFG1 = 1;
}
static inline void CONFIG_RB2_AS_DIG_OD_OUTPUT(){
 DISABLE_RB2_PULLUP();
 _TRISB2 = 0;
 _PCFG2 = 1;
}
static inline void CONFIG_RB3_AS_DIG_OD_OUTPUT(){
 DISABLE_RB3_PULLUP();
 _TRISB3 = 0;
 _PCFG3 = 1;
}
static inline void CONFIG_RB4_AS_DIG_OD_OUTPUT(){
 DISABLE_RB4_PULLUP();
 _TRISB4 = 0;
 _PCFG4 = 1;
}
static inline void CONFIG_RB5_AS_DIG_OD_OUTPUT(){
 DISABLE_RB5_PULLUP();
 _TRISB5 = 0;
 _PCFG5 = 1;
}
static inline void CONFIG_RB6_AS_DIG_OD_OUTPUT(){
 _TRISB6 = 0;
 _PCFG6 = 1;
}
static inline void CONFIG_RB7_AS_DIG_OD_OUTPUT(){
 _TRISB7 = 0;
 _PCFG7 = 1;
}
static inline void CONFIG_RB8_AS_DIG_OD_OUTPUT(){
 _TRISB8 = 0;
 _PCFG8 = 1;
}
static inline void CONFIG_RB9_AS_DIG_OD_OUTPUT(){
 _TRISB9 = 0;
 _PCFG9 = 1;
}
static inline void CONFIG_RB10_AS_DIG_OD_OUTPUT(){
 _TRISB10 = 0;
 _PCFG10 = 1;
}
static inline void CONFIG_RB11_AS_DIG_OD_OUTPUT(){
 _TRISB11 = 0;
 _PCFG11 = 1;
}
static inline void CONFIG_RB12_AS_DIG_OD_OUTPUT(){
 _TRISB12 = 0;
 _PCFG12 = 1;
}
static inline void CONFIG_RB13_AS_DIG_OD_OUTPUT(){
 _TRISB13 = 0;
 _PCFG13 = 1;
}
static inline void CONFIG_RB14_AS_DIG_OD_OUTPUT(){
 _TRISB14 = 0;
 _PCFG14 = 1;
}
static inline void CONFIG_RB15_AS_DIG_OD_OUTPUT(){
 DISABLE_RB15_PULLUP();
 _TRISB15 = 0;
 _PCFG15 = 1;
}
static inline void CONFIG_RC1_AS_DIG_OD_OUTPUT(){
 _TRISC1 = 0;
 _PCFG16 = 1;
}
static inline void CONFIG_RC2_AS_DIG_OD_OUTPUT(){
 _TRISC2 = 0;
 _PCFG17 = 1;
}
static inline void CONFIG_RC3_AS_DIG_OD_OUTPUT(){
 _TRISC3 = 0;
 _PCFG18 = 1;
}
static inline void CONFIG_RC4_AS_DIG_OD_OUTPUT(){
 _TRISC4 = 0;
 _PCFG19 = 1;
}
static inline void CONFIG_RC12_AS_DIG_OD_OUTPUT(){
 _TRISC12 = 0;
}
static inline void CONFIG_RC13_AS_DIG_OD_OUTPUT(){
 DISABLE_RC13_PULLUP();
 _TRISC13 = 0;
}
static inline void CONFIG_RC14_AS_DIG_OD_OUTPUT(){
 DISABLE_RC14_PULLUP();
 _TRISC14 = 0;
}
static inline void CONFIG_RC15_AS_DIG_OD_OUTPUT(){
 _TRISC15 = 0;
}
static inline void CONFIG_RD0_AS_DIG_OD_OUTPUT(){
 ENABLE_RD0_OPENDRAIN();
 _TRISD0 = 0;
}
static inline void CONFIG_RD1_AS_DIG_OD_OUTPUT(){
 ENABLE_RD1_OPENDRAIN();
 _TRISD1 = 0;
}
static inline void CONFIG_RD2_AS_DIG_OD_OUTPUT(){
 ENABLE_RD2_OPENDRAIN();
 _TRISD2 = 0;
}
static inline void CONFIG_RD3_AS_DIG_OD_OUTPUT(){
 ENABLE_RD3_OPENDRAIN();
 _TRISD3 = 0;
}
static inline void CONFIG_RD4_AS_DIG_OD_OUTPUT(){
 DISABLE_RD4_PULLUP();
 ENABLE_RD4_OPENDRAIN();
 _TRISD4 = 0;
}
static inline void CONFIG_RD5_AS_DIG_OD_OUTPUT(){
 DISABLE_RD5_PULLUP();
 ENABLE_RD5_OPENDRAIN();
 _TRISD5 = 0;
}
static inline void CONFIG_RD6_AS_DIG_OD_OUTPUT(){
 DISABLE_RD6_PULLUP();
 ENABLE_RD6_OPENDRAIN();
 _TRISD6 = 0;
}
static inline void CONFIG_RD7_AS_DIG_OD_OUTPUT(){
 DISABLE_RD7_PULLUP();
 ENABLE_RD7_OPENDRAIN();
 _TRISD7 = 0;
}
static inline void CONFIG_RD8_AS_DIG_OD_OUTPUT(){
 ENABLE_RD8_OPENDRAIN();
 _TRISD8 = 0;
}
static inline void CONFIG_RD9_AS_DIG_OD_OUTPUT(){
 ENABLE_RD9_OPENDRAIN();
 _TRISD9 = 0;
}
static inline void CONFIG_RD10_AS_DIG_OD_OUTPUT(){
 ENABLE_RD10_OPENDRAIN();
 _TRISD10 = 0;
}
static inline void CONFIG_RD11_AS_DIG_OD_OUTPUT(){
 ENABLE_RD11_OPENDRAIN();
 _TRISD11 = 0;
}
static inline void CONFIG_RD12_AS_DIG_OD_OUTPUT(){
 ENABLE_RD12_OPENDRAIN();
 _TRISD12 = 0;
}
static inline void CONFIG_RD13_AS_DIG_OD_OUTPUT(){
 DISABLE_RD13_PULLUP();
 ENABLE_RD13_OPENDRAIN();
 _TRISD13 = 0;
}
static inline void CONFIG_RD14_AS_DIG_OD_OUTPUT(){
 DISABLE_RD14_PULLUP();
 ENABLE_RD14_OPENDRAIN();
 _TRISD14 = 0;
}
static inline void CONFIG_RD15_AS_DIG_OD_OUTPUT(){
 DISABLE_RD15_PULLUP();
 ENABLE_RD15_OPENDRAIN();
 _TRISD15 = 0;
}
static inline void CONFIG_RE0_AS_DIG_OD_OUTPUT(){
 _TRISE0 = 0;
 _PCFG24 = 1;
}
static inline void CONFIG_RE1_AS_DIG_OD_OUTPUT(){
 _TRISE1 = 0;
 _PCFG25 = 1;
}
static inline void CONFIG_RE2_AS_DIG_OD_OUTPUT(){
 _TRISE2 = 0;
 _PCFG26 = 1;
}
static inline void CONFIG_RE3_AS_DIG_OD_OUTPUT(){
 _TRISE3 = 0;
 _PCFG27 = 1;
}
static inline void CONFIG_RE4_AS_DIG_OD_OUTPUT(){
 _TRISE4 = 0;
 _PCFG28 = 1;
}
static inline void CONFIG_RE5_AS_DIG_OD_OUTPUT(){
 _TRISE5 = 0;
 _PCFG29 = 1;
}
static inline void CONFIG_RE6_AS_DIG_OD_OUTPUT(){
 _TRISE6 = 0;
 _PCFG30 = 1;
}
static inline void CONFIG_RE7_AS_DIG_OD_OUTPUT(){
 _TRISE7 = 0;
 _PCFG31 = 1;
}
static inline void CONFIG_RF0_AS_DIG_OD_OUTPUT(){
 ENABLE_RF0_OPENDRAIN();
 _TRISF0 = 0;
}
static inline void CONFIG_RF1_AS_DIG_OD_OUTPUT(){
 ENABLE_RF1_OPENDRAIN();
 _TRISF1 = 0;
}
static inline void CONFIG_RF2_AS_DIG_OD_OUTPUT(){
 ENABLE_RF2_OPENDRAIN();
 _TRISF2 = 0;
}
static inline void CONFIG_RF3_AS_DIG_OD_OUTPUT(){
 ENABLE_RF3_OPENDRAIN();
 _TRISF3 = 0;
}
static inline void CONFIG_RF4_AS_DIG_OD_OUTPUT(){
 DISABLE_RF4_PULLUP();
 ENABLE_RF4_OPENDRAIN();
 _TRISF4 = 0;
}
static inline void CONFIG_RF5_AS_DIG_OD_OUTPUT(){
 DISABLE_RF5_PULLUP();
 ENABLE_RF5_OPENDRAIN();
 _TRISF5 = 0;
}
static inline void CONFIG_RF6_AS_DIG_OD_OUTPUT(){
 ENABLE_RF6_OPENDRAIN();
 _TRISF6 = 0;
}
static inline void CONFIG_RF7_AS_DIG_OD_OUTPUT(){
 ENABLE_RF7_OPENDRAIN();
 _TRISF7 = 0;
}
static inline void CONFIG_RF8_AS_DIG_OD_OUTPUT(){
 ENABLE_RF8_OPENDRAIN();
 _TRISF8 = 0;
}
static inline void CONFIG_RF12_AS_DIG_OD_OUTPUT(){
 ENABLE_RF12_OPENDRAIN();
 _TRISF12 = 0;
}
static inline void CONFIG_RF13_AS_DIG_OD_OUTPUT(){
 ENABLE_RF13_OPENDRAIN();
 _TRISF13 = 0;
}
static inline void CONFIG_RG0_AS_DIG_OD_OUTPUT(){
 ENABLE_RG0_OPENDRAIN();
 _TRISG0 = 0;
}
static inline void CONFIG_RG1_AS_DIG_OD_OUTPUT(){
 ENABLE_RG1_OPENDRAIN();
 _TRISG1 = 0;
}
static inline void CONFIG_RG2_AS_DIG_OD_OUTPUT(){
 ENABLE_RG2_OPENDRAIN();
 _TRISG2 = 0;
}
static inline void CONFIG_RG3_AS_DIG_OD_OUTPUT(){
 ENABLE_RG3_OPENDRAIN();
 _TRISG3 = 0;
}
static inline void CONFIG_RG6_AS_DIG_OD_OUTPUT(){
 DISABLE_RG6_PULLUP();
 ENABLE_RG6_OPENDRAIN();
 _TRISG6 = 0;
}
static inline void CONFIG_RG7_AS_DIG_OD_OUTPUT(){
 DISABLE_RG7_PULLUP();
 ENABLE_RG7_OPENDRAIN();
 _TRISG7 = 0;
}
static inline void CONFIG_RG8_AS_DIG_OD_OUTPUT(){
 DISABLE_RG8_PULLUP();
 ENABLE_RG8_OPENDRAIN();
 _TRISG8 = 0;
}
static inline void CONFIG_RG9_AS_DIG_OD_OUTPUT(){
 DISABLE_RG9_PULLUP();
 ENABLE_RG9_OPENDRAIN();
 _TRISG9 = 0;
}
static inline void CONFIG_RG12_AS_DIG_OD_OUTPUT(){
 ENABLE_RG12_OPENDRAIN();
 _TRISG12 = 0;
}
static inline void CONFIG_RG13_AS_DIG_OD_OUTPUT(){
 ENABLE_RG13_OPENDRAIN();
 _TRISG13 = 0;
}
static inline void CONFIG_RG14_AS_DIG_OD_OUTPUT(){
 ENABLE_RG14_OPENDRAIN();
 _TRISG14 = 0;
}
static inline void CONFIG_RG15_AS_DIG_OD_OUTPUT(){
 ENABLE_RG15_OPENDRAIN();
 _TRISG15 = 0;
}
static inline void CONFIG_RA0_AS_DIG_INPUT(){
 _TRISA0 = 1;
}
static inline void CONFIG_RA1_AS_DIG_INPUT(){
 _TRISA1 = 1;
}
static inline void CONFIG_RA2_AS_DIG_INPUT(){
 _TRISA2 = 1;
}
static inline void CONFIG_RA3_AS_DIG_INPUT(){
 _TRISA3 = 1;
}
static inline void CONFIG_RA4_AS_DIG_INPUT(){
 _TRISA4 = 1;
}
static inline void CONFIG_RA5_AS_DIG_INPUT(){
 _TRISA5 = 1;
}
static inline void CONFIG_RA6_AS_DIG_INPUT(){
 DISABLE_RA6_PULLUP();
 _TRISA6 = 1;
 _PCFG22 = 1;
}
static inline void CONFIG_RA7_AS_DIG_INPUT(){
 DISABLE_RA7_PULLUP();
 _TRISA7 = 1;
 _PCFG23 = 1;
}
static inline void CONFIG_RA9_AS_DIG_INPUT(){
 _TRISA9 = 1;
}
static inline void CONFIG_RA10_AS_DIG_INPUT(){
 _TRISA10 = 1;
}
static inline void CONFIG_RA12_AS_DIG_INPUT(){
 _TRISA12 = 1;
 _PCFG20 = 1;
}
static inline void CONFIG_RA13_AS_DIG_INPUT(){
 _TRISA13 = 1;
 _PCFG21 = 1;
}
static inline void CONFIG_RA14_AS_DIG_INPUT(){
 _TRISA14 = 1;
}
static inline void CONFIG_RA15_AS_DIG_INPUT(){
 _TRISA15 = 1;
}
static inline void CONFIG_RB0_AS_DIG_INPUT(){
 DISABLE_RB0_PULLUP();
 _TRISB0 = 1;
 _PCFG0 = 1;
}
static inline void CONFIG_RB1_AS_DIG_INPUT(){
 DISABLE_RB1_PULLUP();
 _TRISB1 = 1;
 _PCFG1 = 1;
}
static inline void CONFIG_RB2_AS_DIG_INPUT(){
 DISABLE_RB2_PULLUP();
 _TRISB2 = 1;
 _PCFG2 = 1;
}
static inline void CONFIG_RB3_AS_DIG_INPUT(){
 DISABLE_RB3_PULLUP();
 _TRISB3 = 1;
 _PCFG3 = 1;
}
static inline void CONFIG_RB4_AS_DIG_INPUT(){
 DISABLE_RB4_PULLUP();
 _TRISB4 = 1;
 _PCFG4 = 1;
}
static inline void CONFIG_RB5_AS_DIG_INPUT(){
 DISABLE_RB5_PULLUP();
 _TRISB5 = 1;
 _PCFG5 = 1;
}
static inline void CONFIG_RB6_AS_DIG_INPUT(){
 _TRISB6 = 1;
 _PCFG6 = 1;
}
static inline void CONFIG_RB7_AS_DIG_INPUT(){
 _TRISB7 = 1;
 _PCFG7 = 1;
}
static inline void CONFIG_RB8_AS_DIG_INPUT(){
 _TRISB8 = 1;
 _PCFG8 = 1;
}
static inline void CONFIG_RB9_AS_DIG_INPUT(){
 _TRISB9 = 1;
 _PCFG9 = 1;
}
static inline void CONFIG_RB10_AS_DIG_INPUT(){
 _TRISB10 = 1;
 _PCFG10 = 1;
}
static inline void CONFIG_RB11_AS_DIG_INPUT(){
 _TRISB11 = 1;
 _PCFG11 = 1;
}
static inline void CONFIG_RB12_AS_DIG_INPUT(){
 _TRISB12 = 1;
 _PCFG12 = 1;
}
static inline void CONFIG_RB13_AS_DIG_INPUT(){
 _TRISB13 = 1;
 _PCFG13 = 1;
}
static inline void CONFIG_RB14_AS_DIG_INPUT(){
 _TRISB14 = 1;
 _PCFG14 = 1;
}
static inline void CONFIG_RB15_AS_DIG_INPUT(){
 DISABLE_RB15_PULLUP();
 _TRISB15 = 1;
 _PCFG15 = 1;
}
static inline void CONFIG_RC1_AS_DIG_INPUT(){
 _TRISC1 = 1;
 _PCFG16 = 1;
}
static inline void CONFIG_RC2_AS_DIG_INPUT(){
 _TRISC2 = 1;
 _PCFG17 = 1;
}
static inline void CONFIG_RC3_AS_DIG_INPUT(){
 _TRISC3 = 1;
 _PCFG18 = 1;
}
static inline void CONFIG_RC4_AS_DIG_INPUT(){
 _TRISC4 = 1;
 _PCFG19 = 1;
}
static inline void CONFIG_RC12_AS_DIG_INPUT(){
 _TRISC12 = 1;
}
static inline void CONFIG_RC13_AS_DIG_INPUT(){
 DISABLE_RC13_PULLUP();
 _TRISC13 = 1;
}
static inline void CONFIG_RC14_AS_DIG_INPUT(){
 DISABLE_RC14_PULLUP();
 _TRISC14 = 1;
}
static inline void CONFIG_RC15_AS_DIG_INPUT(){
 _TRISC15 = 1;
}
static inline void CONFIG_RD0_AS_DIG_INPUT(){
 _TRISD0 = 1;
}
static inline void CONFIG_RD1_AS_DIG_INPUT(){
 _TRISD1 = 1;
}
static inline void CONFIG_RD2_AS_DIG_INPUT(){
 _TRISD2 = 1;
}
static inline void CONFIG_RD3_AS_DIG_INPUT(){
 _TRISD3 = 1;
}
static inline void CONFIG_RD4_AS_DIG_INPUT(){
 DISABLE_RD4_PULLUP();
 _TRISD4 = 1;
}
static inline void CONFIG_RD5_AS_DIG_INPUT(){
 DISABLE_RD5_PULLUP();
 _TRISD5 = 1;
}
static inline void CONFIG_RD6_AS_DIG_INPUT(){
 DISABLE_RD6_PULLUP();
 _TRISD6 = 1;
}
static inline void CONFIG_RD7_AS_DIG_INPUT(){
 DISABLE_RD7_PULLUP();
 _TRISD7 = 1;
}
static inline void CONFIG_RD8_AS_DIG_INPUT(){
 _TRISD8 = 1;
}
static inline void CONFIG_RD9_AS_DIG_INPUT(){
 _TRISD9 = 1;
}
static inline void CONFIG_RD10_AS_DIG_INPUT(){
 _TRISD10 = 1;
}
static inline void CONFIG_RD11_AS_DIG_INPUT(){
 _TRISD11 = 1;
}
static inline void CONFIG_RD12_AS_DIG_INPUT(){
 _TRISD12 = 1;
}
static inline void CONFIG_RD13_AS_DIG_INPUT(){
 DISABLE_RD13_PULLUP();
 _TRISD13 = 1;
}
static inline void CONFIG_RD14_AS_DIG_INPUT(){
 DISABLE_RD14_PULLUP();
 _TRISD14 = 1;
}
static inline void CONFIG_RD15_AS_DIG_INPUT(){
 DISABLE_RD15_PULLUP();
 _TRISD15 = 1;
}
static inline void CONFIG_RE0_AS_DIG_INPUT(){
 _TRISE0 = 1;
 _PCFG24 = 1;
}
static inline void CONFIG_RE1_AS_DIG_INPUT(){
 _TRISE1 = 1;
 _PCFG25 = 1;
}
static inline void CONFIG_RE2_AS_DIG_INPUT(){
 _TRISE2 = 1;
 _PCFG26 = 1;
}
static inline void CONFIG_RE3_AS_DIG_INPUT(){
 _TRISE3 = 1;
 _PCFG27 = 1;
}
static inline void CONFIG_RE4_AS_DIG_INPUT(){
 _TRISE4 = 1;
 _PCFG28 = 1;
}
static inline void CONFIG_RE5_AS_DIG_INPUT(){
 _TRISE5 = 1;
 _PCFG29 = 1;
}
static inline void CONFIG_RE6_AS_DIG_INPUT(){
 _TRISE6 = 1;
 _PCFG30 = 1;
}
static inline void CONFIG_RE7_AS_DIG_INPUT(){
 _TRISE7 = 1;
 _PCFG31 = 1;
}
static inline void CONFIG_RF0_AS_DIG_INPUT(){
 _TRISF0 = 1;
}
static inline void CONFIG_RF1_AS_DIG_INPUT(){
 _TRISF1 = 1;
}
static inline void CONFIG_RF2_AS_DIG_INPUT(){
 _TRISF2 = 1;
}
static inline void CONFIG_RF3_AS_DIG_INPUT(){
 _TRISF3 = 1;
}
static inline void CONFIG_RF4_AS_DIG_INPUT(){
 DISABLE_RF4_PULLUP();
 _TRISF4 = 1;
}
static inline void CONFIG_RF5_AS_DIG_INPUT(){
 DISABLE_RF5_PULLUP();
 _TRISF5 = 1;
}
static inline void CONFIG_RF6_AS_DIG_INPUT(){
 _TRISF6 = 1;
}
static inline void CONFIG_RF7_AS_DIG_INPUT(){
 _TRISF7 = 1;
}
static inline void CONFIG_RF8_AS_DIG_INPUT(){
 _TRISF8 = 1;
}
static inline void CONFIG_RF12_AS_DIG_INPUT(){
 _TRISF12 = 1;
}
static inline void CONFIG_RF13_AS_DIG_INPUT(){
 _TRISF13 = 1;
}
static inline void CONFIG_RG0_AS_DIG_INPUT(){
 _TRISG0 = 1;
}
static inline void CONFIG_RG1_AS_DIG_INPUT(){
 _TRISG1 = 1;
}
static inline void CONFIG_RG2_AS_DIG_INPUT(){
 _TRISG2 = 1;
}
static inline void CONFIG_RG3_AS_DIG_INPUT(){
 _TRISG3 = 1;
}
static inline void CONFIG_RG6_AS_DIG_INPUT(){
 DISABLE_RG6_PULLUP();
 _TRISG6 = 1;
}
static inline void CONFIG_RG7_AS_DIG_INPUT(){
 DISABLE_RG7_PULLUP();
 _TRISG7 = 1;
}
static inline void CONFIG_RG8_AS_DIG_INPUT(){
 DISABLE_RG8_PULLUP();
 _TRISG8 = 1;
}
static inline void CONFIG_RG9_AS_DIG_INPUT(){
 DISABLE_RG9_PULLUP();
 _TRISG9 = 1;
}
static inline void CONFIG_RG12_AS_DIG_INPUT(){
 _TRISG12 = 1;
}
static inline void CONFIG_RG13_AS_DIG_INPUT(){
 _TRISG13 = 1;
}
static inline void CONFIG_RG14_AS_DIG_INPUT(){
 _TRISG14 = 1;
}
static inline void CONFIG_RG15_AS_DIG_INPUT(){
 _TRISG15 = 1;
}
#define CONFIG_RP0_AS_DIG_PIN() 
#define CONFIG_RP1_AS_DIG_PIN() 
#define CONFIG_RP2_AS_DIG_PIN() 
#define CONFIG_RP3_AS_DIG_PIN() 
#define CONFIG_RP4_AS_DIG_PIN() 
#define CONFIG_RP5_AS_DIG_PIN() 
#define CONFIG_RP6_AS_DIG_PIN() 
#define CONFIG_RP7_AS_DIG_PIN() 
#define CONFIG_RP8_AS_DIG_PIN() 
#define CONFIG_RP9_AS_DIG_PIN() 
#define CONFIG_RP10_AS_DIG_PIN() 
#define CONFIG_RP11_AS_DIG_PIN() 
#define CONFIG_RP12_AS_DIG_PIN() 
#define CONFIG_RP13_AS_DIG_PIN() 
#define CONFIG_RP14_AS_DIG_PIN() 
#define CONFIG_RP15_AS_DIG_PIN() 
#define CONFIG_RP16_AS_DIG_PIN() 
#define CONFIG_RP17_AS_DIG_PIN() 
#define CONFIG_RP18_AS_DIG_PIN() 
#define CONFIG_RP19_AS_DIG_PIN() 
#define CONFIG_RP20_AS_DIG_PIN() 
#define CONFIG_RP21_AS_DIG_PIN() 
#define CONFIG_RP22_AS_DIG_PIN() 
#define CONFIG_RP23_AS_DIG_PIN() 
#define CONFIG_RP24_AS_DIG_PIN() 
#define CONFIG_RP25_AS_DIG_PIN() 
#define CONFIG_RP26_AS_DIG_PIN() 
#define CONFIG_RP27_AS_DIG_PIN() 
#define CONFIG_RP28_AS_DIG_PIN() 
#define CONFIG_RP29_AS_DIG_PIN() 
#define CONFIG_RP30_AS_DIG_PIN() 
#define CONFIG_RP31_AS_DIG_PIN() 
#define CONFIG_RP32_AS_DIG_PIN() 
#define CONFIG_RP33_AS_DIG_PIN() 
#define CONFIG_RP34_AS_DIG_PIN() 
#define CONFIG_RP35_AS_DIG_PIN() 
#define CONFIG_RP36_AS_DIG_PIN() 
#define CONFIG_RP37_AS_DIG_PIN() 
#define CONFIG_RP38_AS_DIG_PIN() 
#define CONFIG_RP39_AS_DIG_PIN() 
#define CONFIG_RP40_AS_DIG_PIN() 
#define CONFIG_RP41_AS_DIG_PIN() 
#define CONFIG_RP42_AS_DIG_PIN() 
#define CONFIG_RP43_AS_DIG_PIN() 
#define CONFIG_RP44_AS_DIG_PIN() 
#define CONFIG_RP45_AS_DIG_PIN() 
#ifdef _PCFG0
static inline void CONFIG_AN0_AS_ANALOG(){
  CONFIG_RB0_AS_DIG_INPUT();
  _PCFG0 = 0;
}
static inline void CONFIG_AN0_AS_DIGITAL(){
  _PCFG0 = 1;
}
#endif
#ifdef _PCFG1
static inline void CONFIG_AN1_AS_ANALOG(){
  CONFIG_RB1_AS_DIG_INPUT();
  _PCFG1 = 0;
}
static inline void CONFIG_AN1_AS_DIGITAL(){
  _PCFG1 = 1;
}
#endif
#ifdef _PCFG2
static inline void CONFIG_AN2_AS_ANALOG(){
  CONFIG_RB2_AS_DIG_INPUT();
  _PCFG2 = 0;
}
static inline void CONFIG_AN2_AS_DIGITAL(){
  _PCFG2 = 1;
}
#endif
#ifdef _PCFG3
static inline void CONFIG_AN3_AS_ANALOG(){
  CONFIG_RB3_AS_DIG_INPUT();
  _PCFG3 = 0;
}
static inline void CONFIG_AN3_AS_DIGITAL(){
  _PCFG3 = 1;
}
#endif
#ifdef _PCFG4
static inline void CONFIG_AN4_AS_ANALOG(){
  CONFIG_RB4_AS_DIG_INPUT();
  _PCFG4 = 0;
}
static inline void CONFIG_AN4_AS_DIGITAL(){
  _PCFG4 = 1;
}
#endif
#ifdef _PCFG5
static inline void CONFIG_AN5_AS_ANALOG(){
  CONFIG_RB5_AS_DIG_INPUT();
  _PCFG5 = 0;
}
static inline void CONFIG_AN5_AS_DIGITAL(){
  _PCFG5 = 1;
}
#endif
#ifdef _PCFG6
static inline void CONFIG_AN6_AS_ANALOG(){
  CONFIG_RB6_AS_DIG_INPUT();
  _PCFG6 = 0;
}
static inline void CONFIG_AN6_AS_DIGITAL(){
  _PCFG6 = 1;
}
#endif
#ifdef _PCFG7
static inline void CONFIG_AN7_AS_ANALOG(){
  CONFIG_RB7_AS_DIG_INPUT();
  _PCFG7 = 0;
}
static inline void CONFIG_AN7_AS_DIGITAL(){
  _PCFG7 = 1;
}
#endif
#ifdef _PCFG8
static inline void CONFIG_AN8_AS_ANALOG(){
  CONFIG_RB8_AS_DIG_INPUT();
  _PCFG8 = 0;
}
static inline void CONFIG_AN8_AS_DIGITAL(){
  _PCFG8 = 1;
}
#endif
#ifdef _PCFG9
static inline void CONFIG_AN9_AS_ANALOG(){
  CONFIG_RB9_AS_DIG_INPUT();
  _PCFG9 = 0;
}
static inline void CONFIG_AN9_AS_DIGITAL(){
  _PCFG9 = 1;
}
#endif
#ifdef _PCFG10
static inline void CONFIG_AN10_AS_ANALOG(){
  CONFIG_RB10_AS_DIG_INPUT();
  _PCFG10 = 0;
}
static inline void CONFIG_AN10_AS_DIGITAL(){
  _PCFG10 = 1;
}
#endif
#ifdef _PCFG11
static inline void CONFIG_AN11_AS_ANALOG(){
  CONFIG_RB11_AS_DIG_INPUT();
  _PCFG11 = 0;
}
static inline void CONFIG_AN11_AS_DIGITAL(){
  _PCFG11 = 1;
}
#endif
#ifdef _PCFG12
static inline void CONFIG_AN12_AS_ANALOG(){
  CONFIG_RB12_AS_DIG_INPUT();
  _PCFG12 = 0;
}
static inline void CONFIG_AN12_AS_DIGITAL(){
  _PCFG12 = 1;
}
#endif
#ifdef _PCFG13
static inline void CONFIG_AN13_AS_ANALOG(){
  CONFIG_RB13_AS_DIG_INPUT();
  _PCFG13 = 0;
}
static inline void CONFIG_AN13_AS_DIGITAL(){
  _PCFG13 = 1;
}
#endif
#ifdef _PCFG14
static inline void CONFIG_AN14_AS_ANALOG(){
  CONFIG_RB14_AS_DIG_INPUT();
  _PCFG14 = 0;
}
static inline void CONFIG_AN14_AS_DIGITAL(){
  _PCFG14 = 1;
}
#endif
#ifdef _PCFG15
static inline void CONFIG_AN15_AS_ANALOG(){
  CONFIG_RB15_AS_DIG_INPUT();
  _PCFG15 = 0;
}
static inline void CONFIG_AN15_AS_DIGITAL(){
  _PCFG15 = 1;
}
#endif
#ifdef _PCFG16
static inline void CONFIG_AN16_AS_ANALOG(){
  CONFIG_RC1_AS_DIG_INPUT();
  _PCFG16 = 0;
}
static inline void CONFIG_AN16_AS_DIGITAL(){
  _PCFG16 = 1;
}
#endif
#ifdef _PCFG17
static inline void CONFIG_AN17_AS_ANALOG(){
  CONFIG_RC2_AS_DIG_INPUT();
  _PCFG17 = 0;
}
static inline void CONFIG_AN17_AS_DIGITAL(){
  _PCFG17 = 1;
}
#endif
#ifdef _PCFG18
static inline void CONFIG_AN18_AS_ANALOG(){
  CONFIG_RC3_AS_DIG_INPUT();
  _PCFG18 = 0;
}
static inline void CONFIG_AN18_AS_DIGITAL(){
  _PCFG18 = 1;
}
#endif
#ifdef _PCFG19
static inline void CONFIG_AN19_AS_ANALOG(){
  CONFIG_RC4_AS_DIG_INPUT();
  _PCFG19 = 0;
}
static inline void CONFIG_AN19_AS_DIGITAL(){
  _PCFG19 = 1;
}
#endif
#ifdef _PCFG20
static inline void CONFIG_AN20_AS_ANALOG(){
  CONFIG_RA12_AS_DIG_INPUT();
  _PCFG20 = 0;
}
static inline void CONFIG_AN20_AS_DIGITAL(){
  _PCFG20 = 1;
}
#endif
#ifdef _PCFG21
static inline void CONFIG_AN21_AS_ANALOG(){
  CONFIG_RA13_AS_DIG_INPUT();
  _PCFG21 = 0;
}
static inline void CONFIG_AN21_AS_DIGITAL(){
  _PCFG21 = 1;
}
#endif
#ifdef _PCFG22
static inline void CONFIG_AN22_AS_ANALOG(){
  CONFIG_RA6_AS_DIG_INPUT();
  _PCFG22 = 0;
}
static inline void CONFIG_AN22_AS_DIGITAL(){
  _PCFG22 = 1;
}
#endif
#ifdef _PCFG23
static inline void CONFIG_AN23_AS_ANALOG(){
  CONFIG_RA7_AS_DIG_INPUT();
  _PCFG23 = 0;
}
static inline void CONFIG_AN23_AS_DIGITAL(){
  _PCFG23 = 1;
}
#endif
#ifdef _PCFG24
static inline void CONFIG_AN24_AS_ANALOG(){
  CONFIG_RE0_AS_DIG_INPUT();
  _PCFG24 = 0;
}
static inline void CONFIG_AN24_AS_DIGITAL(){
  _PCFG24 = 1;
}
#endif
#ifdef _PCFG25
static inline void CONFIG_AN25_AS_ANALOG(){
  CONFIG_RE1_AS_DIG_INPUT();
  _PCFG25 = 0;
}
static inline void CONFIG_AN25_AS_DIGITAL(){
  _PCFG25 = 1;
}
#endif
#ifdef _PCFG26
static inline void CONFIG_AN26_AS_ANALOG(){
  CONFIG_RE2_AS_DIG_INPUT();
  _PCFG26 = 0;
}
static inline void CONFIG_AN26_AS_DIGITAL(){
  _PCFG26 = 1;
}
#endif
#ifdef _PCFG27
static inline void CONFIG_AN27_AS_ANALOG(){
  CONFIG_RE3_AS_DIG_INPUT();
  _PCFG27 = 0;
}
static inline void CONFIG_AN27_AS_DIGITAL(){
  _PCFG27 = 1;
}
#endif
#ifdef _PCFG28
static inline void CONFIG_AN28_AS_ANALOG(){
  CONFIG_RE4_AS_DIG_INPUT();
  _PCFG28 = 0;
}
static inline void CONFIG_AN28_AS_DIGITAL(){
  _PCFG28 = 1;
}
#endif
#ifdef _PCFG29
static inline void CONFIG_AN29_AS_ANALOG(){
  CONFIG_RE5_AS_DIG_INPUT();
  _PCFG29 = 0;
}
static inline void CONFIG_AN29_AS_DIGITAL(){
  _PCFG29 = 1;
}
#endif
#ifdef _PCFG30
static inline void CONFIG_AN30_AS_ANALOG(){
  CONFIG_RE6_AS_DIG_INPUT();
  _PCFG30 = 0;
}
static inline void CONFIG_AN30_AS_DIGITAL(){
  _PCFG30 = 1;
}
#endif
#ifdef _PCFG31
static inline void CONFIG_AN31_AS_ANALOG(){
  CONFIG_RE7_AS_DIG_INPUT();
  _PCFG31 = 0;
}
static inline void CONFIG_AN31_AS_DIGITAL(){
  _PCFG31 = 1;
}
#endif
#define DISABLE_C2IND_ANALOG()   
#define DISABLE_U2CTS_ANALOG()   
#define DISABLE_CTPLS_ANALOG()   
#define DISABLE_U4TX_ANALOG()   
#define DISABLE_SS2_ANALOG()   
#define DISABLE_U3TX_ANALOG()   
#define DISABLE_C1OUT_ANALOG()   
#define DISABLE_INT1_ANALOG()   
#define DISABLE_U1RTS_ANALOG()   
#define DISABLE_T5CK_ANALOG()   
#define DISABLE_C1IND_ANALOG()   
#define DISABLE_U3CTS_ANALOG()   
#define DISABLE_OC5_ANALOG()   
#define DISABLE_U2TX_ANALOG()   
#define DISABLE_C2INA_ANALOG()   
#define DISABLE_INT0_ANALOG()   
#define DISABLE_U1BCLK_ANALOG()   
#define DISABLE_SS1_ANALOG()   
#define DISABLE_IC4_ANALOG()   
#define DISABLE_OCFB_ANALOG()   
#define DISABLE_C1TX_ANALOG()   
#define DISABLE_RTCC_ANALOG()   
#define DISABLE_IC3_ANALOG()   
#define DISABLE_T3CK_ANALOG()   
#define DISABLE_C2OUT_ANALOG()   
#define DISABLE_INT2_ANALOG()   
#define DISABLE_OCFA_ANALOG()   
#define DISABLE_OC4_ANALOG()   
#define DISABLE_U1RX_ANALOG()   
#define DISABLE_IC8_ANALOG()   
#define DISABLE_U3RX_ANALOG()   
#define DISABLE_CTED2_ANALOG()   
#define DISABLE_IC1_ANALOG()   
#define DISABLE_U2BCLK_ANALOG()   
#define DISABLE_C1INA_ANALOG()   
#define DISABLE_T4CK_ANALOG()   
#define DISABLE_C2INC_ANALOG()   
#define DISABLE_IC7_ANALOG()   
#define DISABLE_IC2_ANALOG()   
#define DISABLE_U2RTS_ANALOG()   
#define DISABLE_U4RTS_ANALOG()   
#define DISABLE_SDI2_ANALOG()   
#define DISABLE_OC2_ANALOG()   
#define DISABLE_C1RX_ANALOG()   
#define DISABLE_C2RX_ANALOG()   
#define DISABLE_SDO1_ANALOG()   
#define DISABLE_U1CTS_ANALOG()   
#define DISABLE_OC3_ANALOG()   
#define DISABLE_C21INB_ANALOG()   
#define DISABLE_U1TX_ANALOG()   
#define DISABLE_T1CK_ANALOG()   
#define DISABLE_SCK1_ANALOG()   
#define DISABLE_U2RX_ANALOG()   
#define DISABLE_T2CK_ANALOG()   
#define DISABLE_CTED1_ANALOG()   
#define DISABLE_U3RTS_ANALOG()   
#define DISABLE_SDO2_ANALOG()   
#define DISABLE_C1INC_ANALOG()   
#define DISABLE_U4RX_ANALOG()   
#define DISABLE_IC5_ANALOG()   
#define DISABLE_SDI1_ANALOG()   
#define DISABLE_C1INB_ANALOG()   
#define DISABLE_OC1_ANALOG()   
#define DISABLE_SCK2_ANALOG()   
#define DISABLE_IC6_ANALOG()   
#define DISABLE_U4CTS_ANALOG()   
#define _PIC24_DIGIO_DEFINED
